1. Field of the Invention
This invention relates to integrated circuits having transistors provided with current injectors, the transistors having bases and collectors, several of said transistors being connected to associated current injectors for supplying bias current. Each current injector has at least a first, a second and a third layer, which are successive layers separated from each other by rectifying junctions. Two connections for a supply source are present, so that the transistors with their associated current injectors are distributed among several groups which require approximately equal bias currents and which are connected in series between the two connections. A first of the groups forms a highest stage in the series arrangement. The first layer of the associated current injector(s) is connected to the one connection. Another one of the groups forms a lowest stage in the series arrangement. The second layer of the associated current injector(s) is connected to the second connection.
The remaining groups form intermediate stages. The higher stages in the series arrangement are present nearer to the highest stage than the lower ones, the second layer of the associated current injector(s) of the highest stage being connected to the first layer of the associated current injector(s) of the next lower stage, and electric signal connection being present between a collector of a controlling transistor situated in a higher stage and a base of a controlled transistor situated in a lower stage. The signal connection comprises at least an auxiliary transistor of a type complementary to that of the controlling and the controlled transistor, the collector of the complementary auxiliary transistor being connected to the base of the controlled transistor.
2. Description of the Prior Art
Such I.sup.2 L circuits are known from U.S. Pat. No. 4,007,385. The signal connection comprises a current source for activating the controlled transistor. When the auxiliary transistor is conductive, the base of the controlled transistor receives bias current so that the latter is also conductive. When the current through the auxiliary transistor is interrupted by means of the controlling transistor, the controlled transistor switches to the non-conductive state for lack of base current.
The disadvantage of this known I.sup.2 L circuit is that in certain circumstances the switching of the controlled transistor to the non-conductive state occurs relatively slowly. This switching time depends on the time which is necessary to dissipate the charge which is stored in the controlled transistor.
It is one of the objects of the present invention to shorten the switching time.